Practical Digital Design

Practical Digital Design

An Introduction to VHDL

Reidenbach, Bruce

Purdue University Press

07/2022

440

Dura

Inglês

9781612497662

15 a 20 dias

Descrição não disponível.
PREFACE
ACKNOWLEDGMENTS
ABOUT THE AUTHOR
CHAPTER 1 INTRODUCTION
CHAPTER 2 SIGNALS, TIME, AND THE SIMULATION CYCLE
CHAPTER 3 THE VHDL DESIGN ENVIRONMENT
CHAPTER 4 DECLARATIONS
CHAPTER 5 LIBRARIES AND DESIGN UNITS
CHAPTER 6 CONCURRENT STATEMENTS
CHAPTER 7 SEQUENTIAL STATEMENTS
CHAPTER 8 THE PROCESS STATEMENT
CHAPTER 9 MODELING CASE STUDIES
CHAPTER 10 SUBPROGRAMS
CHAPTER 11 SIMULATION AND TEST BENCHES
CHAPTER 12 TEST BENCH DEVELOPMENT
CHAPTER 13 TEST BENCH CASE STUDIES
CHAPTER 14 LOGIC SYNTHESIS
CHAPTER 15 ASIC AND FPGA TECHNOLOGY
CHAPTER 16 SYNTHESIS CODE EXAMPLES
CHAPTER 17 SPECIALIZED CODE EXAMPLES
CHAPTER 18 STATE MACHINES
CHAPTER 19 FUNCTIONAL DECOMPOSITION
CHAPTER 20 FILTER DESIGN EXAMPLE
CHAPTER 21 DESIGN REUSE
APPENDIX A CODING STYLE GUIDELINES
APPENDIX B FUNCTIONAL DESCRIPTION EXAMPLE
APPENDIX C VHDL RESERVED WORDS
STATEMENT INDEX
SUBJECT INDEX
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VHDL; VHSIC Hardware Description Language; digital design; logic design; logic simulation; test bench; constrained random testing; logic synthesis; concurrent languages; functional decomposition; design reuse; FPGA; ASIC; field-programmable gate array; application-specific integrated circuit