VLSI-SoC: New Technology Enabler
portes grátis
VLSI-SoC: New Technology Enabler
27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers
Silva-Cardenas, Carlos; De Micheli, Giovanni; Gaillardon, Pierre-Emmanuel; Metzler, Carolina; Reis, Ricardo
Springer Nature Switzerland AG
07/2021
345
Mole
Inglês
9783030532758
15 a 20 dias
557
Descrição não disponível.
Software-Based Self-Test for Delay Faults.- On Test Generation for Microprocessors for Extended Class of Functional Faults.- Robust FinFET Schmitt Trigger Designs for Low Power Applications.- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.- Process Variability Impact on the SET Response of FinFET Multi-level Design.- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques.- A Statistical Wafer Scale Error and Redundancy Analysis Simulator.- Hardware-enabled Secure Firmware Updates in Embedded Systems.- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance.- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers.- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.- Semi- and Fully-Random Access LUTs for Smooth Functions.- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
artificial intelligence;CAD;computer-aided design;distributed computer systems;distributed systems;embedded systems;field programmable gate array;FPGA;integrated circuit layout;integrated circuits;internet;microprocessor chips;parallel processing systems;processors;signal processing;software design;software engineering;vlsi circuits
Software-Based Self-Test for Delay Faults.- On Test Generation for Microprocessors for Extended Class of Functional Faults.- Robust FinFET Schmitt Trigger Designs for Low Power Applications.- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.- Process Variability Impact on the SET Response of FinFET Multi-level Design.- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques.- A Statistical Wafer Scale Error and Redundancy Analysis Simulator.- Hardware-enabled Secure Firmware Updates in Embedded Systems.- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance.- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers.- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.- Semi- and Fully-Random Access LUTs for Smooth Functions.- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
artificial intelligence;CAD;computer-aided design;distributed computer systems;distributed systems;embedded systems;field programmable gate array;FPGA;integrated circuit layout;integrated circuits;internet;microprocessor chips;parallel processing systems;processors;signal processing;software design;software engineering;vlsi circuits
