VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence
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VLSI-SoC 2023: Innovations for Trustworthy Artificial Intelligence
31st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2023, Sharjah, United Arab Emirates, October 16-18, 2023, Revised Extended Selected Papers
Albasha, Lutfi; Elfadel, Ibrahim (Abe) M.
Springer International Publishing AG
12/2024
295
Dura
9783031709463
Pré-lançamento - envio 15 a 20 dias após a sua edição
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.- Architectures.
.- Synthesis of SFQ Circuits with Compound Gates.
.- Architecture-Compiler Co-Design for ReRAM-based Multi-Core CIM Architectures.
.- A Leap of Confidence: A Write-Intensity aware Prudent Page Migration for Hybrid Memories.
.- Efficient Depth Optimization in Quantum Addition and Modular Arithmetic with Ling Structure.
.- Accelerators.
.- Exploring Constrained-Modulus Modular Multipliers for Improved Area, Power and Flexibility.
.- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.
.- A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator.
.- Resiliency and Robustness .
.- Analyzing the Reliability of TCUs Through Micro-architecture and Structural Evaluations for Two Real Number Formats.
.- Advanced Quality Assurance Platform for Robust Process Design Kits.
.- FPGA-Implementation Techniques to Efficiently Test Application Readiness of Mixed-Signal Products.
.- Radiation Tolerant 14T SRAM Cell for Avionics Applications.
.- 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect.
.-Security and Privacy.
.- Enhancing HW-SW Confidentiality Verification for Embedded Processors with SoftFlow's Advanced Memory Range Feature.
.- Confidential Inference in Decision Trees.
.- Enhancing the Security of IJTAG network using Inherently Secure SIB.
.- Synthesis of SFQ Circuits with Compound Gates.
.- Architecture-Compiler Co-Design for ReRAM-based Multi-Core CIM Architectures.
.- A Leap of Confidence: A Write-Intensity aware Prudent Page Migration for Hybrid Memories.
.- Efficient Depth Optimization in Quantum Addition and Modular Arithmetic with Ling Structure.
.- Accelerators.
.- Exploring Constrained-Modulus Modular Multipliers for Improved Area, Power and Flexibility.
.- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.
.- A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator.
.- Resiliency and Robustness .
.- Analyzing the Reliability of TCUs Through Micro-architecture and Structural Evaluations for Two Real Number Formats.
.- Advanced Quality Assurance Platform for Robust Process Design Kits.
.- FPGA-Implementation Techniques to Efficiently Test Application Readiness of Mixed-Signal Products.
.- Radiation Tolerant 14T SRAM Cell for Avionics Applications.
.- 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect.
.-Security and Privacy.
.- Enhancing HW-SW Confidentiality Verification for Embedded Processors with SoftFlow's Advanced Memory Range Feature.
.- Confidential Inference in Decision Trees.
.- Enhancing the Security of IJTAG network using Inherently Secure SIB.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
sensors;vlsi circuits;VLSI;System on chip;Network on Chip;Logic Design;Analog Design; Mixed-signal Design;Architectures; Accelerators for Artificial Intelligence; Design for Test; Design for Trust;In-memory Computing;Emerging Computing Paradigms; EDA; Integrated Circuits for Signal Processing and Communication; IoT; Cyber Physical Systems
.- Architectures.
.- Synthesis of SFQ Circuits with Compound Gates.
.- Architecture-Compiler Co-Design for ReRAM-based Multi-Core CIM Architectures.
.- A Leap of Confidence: A Write-Intensity aware Prudent Page Migration for Hybrid Memories.
.- Efficient Depth Optimization in Quantum Addition and Modular Arithmetic with Ling Structure.
.- Accelerators.
.- Exploring Constrained-Modulus Modular Multipliers for Improved Area, Power and Flexibility.
.- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.
.- A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator.
.- Resiliency and Robustness .
.- Analyzing the Reliability of TCUs Through Micro-architecture and Structural Evaluations for Two Real Number Formats.
.- Advanced Quality Assurance Platform for Robust Process Design Kits.
.- FPGA-Implementation Techniques to Efficiently Test Application Readiness of Mixed-Signal Products.
.- Radiation Tolerant 14T SRAM Cell for Avionics Applications.
.- 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect.
.-Security and Privacy.
.- Enhancing HW-SW Confidentiality Verification for Embedded Processors with SoftFlow's Advanced Memory Range Feature.
.- Confidential Inference in Decision Trees.
.- Enhancing the Security of IJTAG network using Inherently Secure SIB.
.- Synthesis of SFQ Circuits with Compound Gates.
.- Architecture-Compiler Co-Design for ReRAM-based Multi-Core CIM Architectures.
.- A Leap of Confidence: A Write-Intensity aware Prudent Page Migration for Hybrid Memories.
.- Efficient Depth Optimization in Quantum Addition and Modular Arithmetic with Ling Structure.
.- Accelerators.
.- Exploring Constrained-Modulus Modular Multipliers for Improved Area, Power and Flexibility.
.- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.
.- A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator.
.- Resiliency and Robustness .
.- Analyzing the Reliability of TCUs Through Micro-architecture and Structural Evaluations for Two Real Number Formats.
.- Advanced Quality Assurance Platform for Robust Process Design Kits.
.- FPGA-Implementation Techniques to Efficiently Test Application Readiness of Mixed-Signal Products.
.- Radiation Tolerant 14T SRAM Cell for Avionics Applications.
.- 3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect.
.-Security and Privacy.
.- Enhancing HW-SW Confidentiality Verification for Embedded Processors with SoftFlow's Advanced Memory Range Feature.
.- Confidential Inference in Decision Trees.
.- Enhancing the Security of IJTAG network using Inherently Secure SIB.
Este título pertence ao(s) assunto(s) indicados(s). Para ver outros títulos clique no assunto desejado.
sensors;vlsi circuits;VLSI;System on chip;Network on Chip;Logic Design;Analog Design; Mixed-signal Design;Architectures; Accelerators for Artificial Intelligence; Design for Test; Design for Trust;In-memory Computing;Emerging Computing Paradigms; EDA; Integrated Circuits for Signal Processing and Communication; IoT; Cyber Physical Systems
